1. Field of the Invention
The present invention relates to the configuration of a line adapter that interfaces between an ATM switch section and each line accommodated in an asynchronous transfer mode (ATM) switching machine that accommodates high-speed and low-speed lines in intermingled fashion and performs cell-based switching.
2. Description of the Related Art
In an ATM switching machine accommodating high-speed lines operating at 46 Mbits/s, 155 Mbits/s, etc. and low-speed lines operating at 6 Mbits/s, 1.5 Mbits/s, etc. in intermingled fashion, cell traffic from the ATM switch section fluctuates greatly, and therefore, it is necessary to provide a shaper circuit for smoothing out the traffic for delivery to each line.
A shaper circuit has on its input side a cell buffer for storing cells. Arriving cells are temporarily stored in the cell buffer, and read out and output at a constant rate, thus smoothing out the cell traffic. According to traffic theory, when there is a large difference between the incoming cell highway speed and the outgoing cell rate (line rate) in the shaper circuit (which means that the outgoing line rate is low), the cell buffering capacity of the cell buffer must be increased to reduce the cell loss rate (CLR).
Traditionally, such a shaper circuit has been placed in the ATM switch section, in which case, however, a cell buffer having a capacity matched to a low-speed line had to be provided for each line so that various kinds of lines of different speeds can be supported. Such cell capacity is redundant for high-speed lines, and increases the cost of the ATM switching machine.
Generally, in ATM switching, a charge is made to a subscriber based on the cell amount transmitted to the subscriber's line. On the other hand, in a shaper circuit, when cells are input in bursts, cell loss may occur; therefore, a measure must be taken to prevent a charge from being made for discarded cells.
In the prior art, the shaper circuit has been constructed to read out a cell for output for every N cell slots, where N is a value equal to the incoming cell highway speed divided by a specified outgoing cell rate. Here, N is not limited to an integer but may take a real number given in fixed point representation. The shaper circuit may sometimes be required to output cells at a rate perfectly matched to the line speed (at full rate) in order to minimize cell discard in the shaper circuit. In this case, the N is set to a value equal to the system cell highway speed divided by the line speed. This value is not always expressed in fixed point representation with a finite number of digits, such as 3/7, and in such a case, the above prior art shaper circuit cannot output cells at exactly the full rate.
For cells output on the line from the ATM switching system, a format conversion buffer is provided that converts data contained in the cells conforming to the cell format in the ATM switching machine, to the cell format on the outgoing line. Further, a phase-locked oscillator (PLO) is used to synchronize the line clock to the system clock. However, when system switching is made for the purpose of system maintenance, etc., a situation occurs where the PLO is temporarily put out of synchronization. In this situation, if the system speed is high and the line speed is low, there is a possibility that cells exceeding the capacity of the cell buffer may be sent out. This has necessitated the provision of a buffer capacity larger than that used in normal system operation.
In the prior art, since a method has been employed in which human operators perform checks by tracing output cell data, cell slots, etc. using general-purpose measuring instruments, there has been a limitation in testing the speed and cell rate under actual operating conditions. Furthermore, the need for necessary measuring instruments has lead to an increase in cost.